A register scoreboard is a hardware mechanism commonly used in processors such as central processing units (CPUs) and/or graphics processing units (GPUs) to avoid data hazards between instructions that are executing out of order. A processing unit uses the register scoreboard to enforce data dependencies by stalling instructions until the scoreboard is cleared.
GPUs comprise many small processors, also referred to as execution units (EUs), each of which may have a large register file. Hence, the scoreboard logic may consume an inordinate amount of the GPU's die size. For example, a GPU may contain dozens of EUs, and an EU that includes seven (7) hardware threads, each of which has 128 GRF (General Register File) registers would require scoreboards for 896 registers for each EU. At the same time, all registers may be used as the destination or source operands of the instructions; also the scoreboard must track the status of multiple registers all at once for the multiple registers access instructions in the GPU. All these make the scoreboard logic even more complex.